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 STW55NM60ND
N-channel 600 V - 0.047 - 51 A TO-247 FDmeshTM II Power MOSFET (with fast diode)
Preliminary Data
Features
Type STW55NM60ND

VDSS 600 V
RDS(on)
ID
Pw
< 0.060 51 A 350 W
The worldwide best RDS(on) amongst the fast recovery diode devices in TO-247 100% avalanche tested Low input capacitance and gate charge Low gate input resistance High dv/dt and avalanche capabilities
1 2 3
TO-247
Application
Switching applications
Figure 1.
Internal schematic diagram
Description
The FDmeshTM II series belongs to the second generation of MDmeshTM technology. This revolutionary Power MOSFET associates a new vertical structure to the company's strip layout and associates all advantages of reduced onresistance and fast switching with an intrinsic fastrecovery body diode.It is therefore strongly recommended for bridge topologies, in particular ZVS phase-shift converters.
Table 1.
Device summary
Marking 55NM60ND Package TO-247 Packaging Tube
Order codes STW55NM60ND
November 2007
Rev 1
1/9
www.st.com 9
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Electrical ratings
STW55NM60ND
1
Electrical ratings
Table 2.
Symbol VDS VGS ID ID IDM
(1)
Absolute maximum ratings
Parameter Drain-source voltage (VGS = 0) Gate- source voltage Drain current (continuous) at TC = 25 C Drain current (continuous) at TC = 100 C Drain current (pulsed) Total dissipation at TC = 25 C Derating factor Value 600 25 51 32 204 350 2.8 40 -55 to 150 150 Unit V V A A A W W/C V/ns C
PTOT dv/dt(2) Tstg Tj
2.
Peak diode recovery voltage slope Storage temperature Max. operating junction temperature
1. Pulse width limited by safe operating area ISD 51 A, di/dt 600 A/s, VDD = 80% V(BR)DSS
Table 3.
Symbol
Thermal data
Parameter Value 0.36 50 300 Unit C/W C/W C
Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-ambient max Tl Maximum lead temperature for soldering purpose
Table 4.
Symbol IAS EAS
Avalanche characteristics
Parameter Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max) Single pulse avalanche energy (starting Tj = 25 C, ID = IAS, VDD = 50 V) Max value 15 850 Unit A mJ
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STW55NM60ND
Electrical characteristics
2
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 5.
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on)
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate-body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 1 mA, VGS = 0 VDS = Max rating VDS = Max rating @125 C VGS = 20 V VDS = VGS, ID = 250 A VGS = 10 V, ID = 25.5 A 3 4 0.047 Min. 600 1 10 100 5 0.060 Typ. Max. Unit V A A nA V
Table 6.
Symbol gfs (1) Ciss Coss Crss Coss eq.(2) td(on) tr td(off) tf Qg Qgs Qgd Rg
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Equivalent output capacitance Turn-on delay time Rise time Turn-off delay time Fall time Total gate charge Gate-source charge Gate-drain charge Gate input resistance Test conditions VDS = 15 V, ID = 25.5 A VDS = 50 V, f = 1 MHz, VGS = 0 Min. Typ. 45 5800 300 30 900 TBD TBD TBD TBD 190 30 90 2.5 Max. Unit S pF pF pF
VGS = 0, VDS = 0 to 480 V VDD = 300 V, ID = 25.5 A RG = 4.7 , VGS = 10 V (see Figure 7), (see Figure 2) VDD = 480 V, ID = 51 A, VGS = 10 V, (see Figure 3) f=1 MHz Gate DC Bias = 0 Test signal level = 20 mV Open drain
pF ns ns ns ns nC nC nC
1. Pulsed: pulse duration=300s, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
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Electrical characteristics
STW55NM60ND
Table 7.
Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM trr Qrr IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 50 A, VGS = 0 ISD = 50 A, VDD = 100 V di/dt = 100 A/s (see Figure 4) ISD = 50 A,VDD = 100 V di/dt = 100 A/s, Tj = 150 C (see Figure 4) TBD TBD TBD TBD TBD TBD Test conditions Min. Typ. Max. 51 204 1.3 Unit A A V ns C A ns C A
1. Pulse width limited by safe operating area 2. Pulsed: Pulse duration = 300 s, duty cycle 1.5%.
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STW55NM60ND
Test circuit
3
Figure 2.
Test circuit
Switching times test circuit for resistive load Figure 3. Gate charge test circuit
Figure 4.
Test circuit for inductive load Figure 5. switching and diode recovery times
Unclamped Inductive load test circuit
Figure 6.
Unclamped inductive waveform
Figure 7.
Switching time waveform
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Package mechanical data
STW55NM60ND
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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STW55NM60ND
Package mechanical data
TO-247 MECHANICAL DATA
mm. MIN. 4.85 2.20 1.0 2.0 3.0 0.40 19.85 15.45 5.45 14.20 3.70 18.50 3.55 4.50 5.50 3.65 5.50 0.140 0.177 0.216 14.80 4.30 0.560 0.14 0.728 0.143 0.216 TYP MAX. 5.15 2.60 1.40 2.40 3.40 0.80 20.15 15.75 MIN. 0.19 0.086 0.039 0.079 0.118 0.015 0.781 0.608 0.214 0.582 0.17 inch TYP. MAX. 0.20 0.102 0.055 0.094 0.134 0.03 0.793 0.620
DIM. A A1 b b1 b2 c D E e L L1 L2 oP oR S
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Revision history
STW55NM60ND
5
Revision history
Table 8.
Date 16-Nov-2007
Document revision history
Revision 1 First release. Changes
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STW55NM60ND
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